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Data Sheet, V 1.0, June 2007
T LE4 99 7I
Programmable Linear Hall Sensor for Industrial Use
Sensors
Never
stop
thinking.
Edition 2007-06 Published by Infineon Technologies AG, Am Campeon 1-12, 85579 Neubiberg, Germany
(c) Infineon Technologies AG 2007.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
TLE4997I
Revision History: Previous Version: Page
2007-06
V 1.0
Subjects (major changes since last revision)
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TLE4997I
Table of Contents 1 1.1 1.2 1.3 2 2.1 2.2 2.3 2.4 3 4 5 6 6.1 6.2 6.3 6.4 6.5 6.6 7 7.1 7.2 7.3 8 8.1 9 9.1 9.2 10 11 12
Page 7 7 8 8
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Transfer Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Field Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Offset Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSP Input Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAC Input Interpolation Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltages Outside the Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Circuit of Supply Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Not Correctable EEPROM Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 18 19 19 20 22 23 25 25 25 26
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Parameter Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Calibration Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Life Support Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Data Sheet
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TLE4997I
List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11
Page
Pin Configuration and Hall Cell Location . . . . . . . . . . . . . . . . . . . . . . . . 8 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Examples of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Ratiometry Error Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Signal Processing Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DSP Input Filter (Magnitude Plot) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DAC Input Filter (Magnitude Plot) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Clamping Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 EEPROM Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PG-SSO-3-10 (Plastic Green Single Small Outline Package) . . . . . . . 33
Data Sheet
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TLE4997I
List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18
Page
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Range Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low Pass Filter Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Undervoltage and Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Open Circuit (OBD Parameters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 EEPROM Error Signalling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Calibration Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Programming Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Data Sheet
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Programmable Linear Hall Sensor for Industrial Use
TLE4997I
1
1.1
Overview
Features
* High linear and ratiometric push-pull rail-to-rail output signal * 20-bit Digital Signal Processing * Digital temperature compensation * 12-bit overall resolution * Operates from -40C up to 120C * Low drift of output signal over temperature and lifetime * Programmable parameters stored in redundant EEPROM (single bit error correction): - magnetic range and magnetic sensitivity (gain) - zero field voltage (offset) - bandwidth - polarity of the output slope - clamping option - temperature coefficient for all common magnets - memory lock * Re-programmable until memory lock * Single supply voltage 4.5 - 5.5 V (4 - 7 V in extended range) * Continuous measurement ranges between -200 mT and +200 mT * Slim 3-pin package (Green) * Reverse polarity and overvoltage protection for all pins * Output short circuit protection * On-board diagnostics (wire breakage detection, undervoltage, overvoltage) * Digital readout of internal temperature and magnetic field values in calibration mode. * Individual programming and operation of multiple sensors with common power supply * Two-point calibration of magnetic transfer function * Precise calibration without iteration steps * High immunity against mechanical stress, EMC, ESD
Type TLE4997I
Data Sheet
Marking 4997I2
7
Ordering Code SP000248475
Package PG-SSO-3-10
V 1.0, 2007-06
TLE4997I
Overview
1.2
Target Applications
* Robust replacement of potentiometers - No mechanical abrasion - Resistant to humidity, temperature, pollution and vibration * Linear and angular position sensing * High current sensing
1.3
Pin Configuration
Figure 1 shows the location of the Hall element in the chip and the distance between the Hall probe and the surface of the package.
2.03 0.1
1.625 0.1
0.38 0.05
Center of Hall Probe
Branded Side Hall-Probe
1
2
3
AEP03717
Figure 1 Table 1 Pin No. 1 2 3
Pin Configuration and Hall Cell Location Pin Definitions and Functions Symbol Function Supply voltage / programming interface Ground Output voltage / programming interface
VDD GND OUT
Data Sheet
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TLE4997I
General
2
2.1
General
Block Diagram
Figure 2 shows a simplified block diagram.
VDD Interface Bias Supply EEPROM
A D D A
enable
HALL
OUT VDD
DSP
Temp. Sense
A D
OBD GND ROM
Figure 2
Block Diagram
2.2
Functional Description
The linear Hall IC TLE4997I has been designed specifically to meet the demands of highly accurate rotation and position detection, as well as for current measurement applications. The sensor provides a ratiometric analog output voltage, which is ideally suited to Analog-to-Digital (A/D) conversion with the supply voltage as a reference. The IC is produced in BiCMOS technology with high voltage capability and also provides reverse polarity protection. Digital signal processing using a 16-bit DSP architecture and digital temperature compensation guarantees excellent stability over a long period of time. The minimum overall resolution is 12 bits. Nevertheless, some internal stages work with resolutions up to 20 bits.
Data Sheet 9 V 1.0, 2007-06
TLE4997I
General
2.3
Principle of Operation
* A magnetic flux is measured by a Hall-Effect cell. * The output signal from the Hall-Effect cell is converted from Analog to Digital signals. * The chopped Hall-effect cell and continuous-time A to D conversion provide very low and stable magnetic offset. * A programmable Low-Pass filter reduces the noise. * The temperature is measured and A to D converted. * Temperature compensation is processed digitally using a second order function. * Digital processing of output voltage is based on zero field and sensitivity value. * The output voltage range can be clamped by digital limiters. * The final output value is D to A converted. * The output voltage is proportional to the supply voltage (ratiometric DAC). * An On-Board-Diagnostics (OBD) circuit connects the output to VDD or GND in case of errors.
Data Sheet
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TLE4997I
General
2.4
Transfer Functions
The examples in Figure 3 show how easily different magnetic field ranges can be mapped to the output voltage. * Polarity Mode: - Unipolar: Only North- or South-oriented magnetic fields are measured. - Bipolar: Magnetic fields can be measured in both orientations. The limit points must not be symmetric to the zero field point.
* Inversion: The gain values can be set positive or negative.
B (mT) 50
VOUT (V) 5
B (mT) 100
VOUT (V)
B (mT) 5
5 200
0
0
0
0 VOUT
0
0
-100
-200
Example 1: - Bipolar
Example 2: - Unipolar - Big offset - Output for 3.3 V
Example 3: - Bipolar - Inverted (neg. gain)
Figure 3
Examples of Operation
Note: Due to the ratiometry, voltage drops at the VDD line are imaged in the output signal.
Data Sheet
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TLE4997I
Maximum Ratings
3
Table 2 Parameter
Maximum Ratings
Absolute Maximum Ratings Symbol Limit Values min. max. 150 150 16 3) 52 16 3) unlimited 2.0 C C V mA mA V T kV According HBM JESD22-A114-B 5) RTHja 150 K/W Vout may be > VDD
1) 1)
Unit
Notes
Storage temperature Junction temperature Voltage on VDD pins with respect to ground (VSS) Supply current @ overvoltage Supply current @ reverse voltage
TST TJ VDD IDDov IDDrev
-40 -40 -16 2) - 75 -16 4) -
RTHja 150 K/W
Voltage on output pin with VOUTov respect to ground (VSS) Magnetic field ESD protection
1) 2)
BMAX VESD
For limited time only. Depends on customer temperature lifetime cycles. Please ask for support by Infineon. max 24 h @ -40C TJ < 30C max 10 min. @ 30C TJ < 80C max 30 sec. @ 80C TJ < 120C max. 24 h @ TJ < 80C. Max. 1 ms @ TJ < 30C; -8.5 V for 100 h @ TJ < 80C. 100 pF and 1.5 k
3) 4) 5)
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Furthermore, only single error cases are assumed. More than one stress/error case may also damage the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. During absolute maximum rating overload conditions (VIN > VDD or VIN < VSS) the voltage on VDD pins with respect to ground (VSS) must not exceed the values defined by the absolute maximum ratings.
Data Sheet
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TLE4997I
Operating Range
4
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4997I. All parameters specified in the following sections of this document refer to these operating conditions, unless otherwise indicated.
Table 3 Parameter
Operating Range Symbol Limit Values min. max. 5.5 7 210 120 V V k nF C For 5000 h Extended range 1) Pull-down to GND Pull-up to VDD Unit Notes
Supply voltage Load resistance Load capacitance Junction temperature
1) 2)
VDD RL CL TJ
4.5 4 10 50 0 -40
2)
For reduced output accuracy.
RTHja 150 K/W.
Note: Keeping signal levels within the limits specified in this table ensures operation without overload conditions
Data Sheet
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TLE4997I
Electrical and Magnetic Parameters
5
Table 4 Parameter
Electrical and Magnetic Parameters
Electrical Characteristics Symbol Limit Values min. typ. max. Unit % VDD mA mA % Also in extended VDD range1), IOUT= 0mA For operating supply voltage range only Of VDD 2) Notes
Output voltage range Supply current Output current @ OUT shorted to supply lines Zero field voltage Zero field voltage drift Ratiometry error Thermal resistance Power on time Power On Reset level
VOUT IDD IOUTsh
5 3 -30
7.5 -
95 10 30 100 0.5 0.5 219 47 1 10 4 12
VZERO -100 VZERO -0.5 -0.5 1.22 -1 3.2 -
% VDD In lifetime 3) % VDD Over temperature3) Of VDD4)5) Junction to air Junction to case K/W K/W ms V mV bit @ VDD = 5 V Interpolation filter 6) 5% exceeded 7)8) Of output DAC @ 100 Hz 9)
ERAT RthJA RthJC tPon
-0.25 2
+0.25 %
VOUT 5% of VDD VOUT 1% of VDD
VDDpon Output DAC quantization VOUT
Output DAC resolution Output DAC bandwidth Output noise Differential non-linearity Signal delay
1) 2) 3)
-
fDAC Vnoise DNL tDS
4.68 1 250
kHz mVpp LSB s
For VOUT within the range of 5%... 95% of VDD Programmable in steps of 1.22 mV ( @ VDD = 5V ). For small sensitivity settings. For higher sensitivities, the magnetic offset drift is dominant. This means that, for an example with a calibrated 60mV/mT sensitivity, the typical output drift might be given due to the allowed magnetic offset tolerance up to 0.5 mT x 60 mV/mT = 30 mV @5 V V DD. For 4.5 VVDD5.5 V and within nominal VOUT range; see "Ratiometry" on Page 15 for details on ERAT. For the maximum error in the extended voltage range, see "Ratiometry" on Page 15. More information, see "DAC Input Interpolation Filter" on Page 22. 100 mT range, sensitivity 60 mV/mT, LP-filter 244 Hz, 160 Hz external RC low pass filter as application circuit. '5% exceeded' means that 5 of 100 continuously measured VOUT samples are out of limit. A sinusoidal magnetic field is applied, VOUT shows amplitude of 20% of VDD, no LP filter is selected.
4) 5) 6) 7) 8) 9)
Data Sheet
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TLE4997I
Electrical and Magnetic Parameters Ratiometry The linear Hall sensor works like a potentiometer. The output voltage is proportional to the supply voltage. The division factor depends on the magnetic field strength. This behavior is called "ratiometric"'. The supply voltage VDD should be used as the reference for the A/D Converter of the microcontroller. In this case, variations of VDD are compensated. The ratiometry error is defined as follows: V OUT ( V DD ) V OUT ( 5V ) E RAT = ------------------------------ - -------------------------- x 100 % 5V V DD The ratiometry error band displays as a "Butterfly Curve".
% n
ERAT
1 0.75 0.5 0.25 0 -0.25 -0.5 -0.75 -1
-n 4 5 6 7
VDD
V
Figure 4
Ratiometry Error Band
The error band in the extended VDD range below 4.5 V and above 5.5 V is defined as shown in Figure 4. In the range from 6 to 7 Volts, the error band depends on the output signal. For VOUT lower than 20% of VDD, the value for n is 2%. For VOUT higher than 80% of VDD, the value for n is 5%. And if VOUT is kept (clamped) in between, the value for n is 1%. Note: Take care of possible voltage drops on the VDD and VOUT line degrading the result. Ideally, both values are acquired and their ratio is calculated to gain the highest accuracy. This method should be used especially during calibration.
Data Sheet 15 V 1.0, 2007-06
TLE4997I
Electrical and Magnetic Parameters Calculation of the Junction Temperature The total power dissipation PTOT of the chip increases its temperature above the ambient temperature. The power multiplied with the total thermal resistance RthJA (Junction to Ambient) leads to the final junction temperature. RthJA is the sum of the addition of the values of the two components Junction to Case and Case to Ambient.
RthJA = RthJC + RthCA TJ = TA + T T = RthJA x PTOT = RthJA x ( VDD x IDD + VOUT x IOUT )
Example (assuming no noticeable load on Vout): - VDD = 5 V - IDD = 10 mA - T = 219 [K/W] x (5 [V] x 0.01 [A] + 0 [VA]) = 11 K
IDD , IOUT > 0, if direction is into IC
For moulded sensors, the calculation with RthJC is more adequate. Magnetic Parameters Table 5 Parameter Sensitivity Magnetic field range Integral nonlinearity Magnetic offset Magnetic offset drift
1) 2) 3) 4) 5)
Magnetic Characteristics Symbol Limit Values min. typ. max. 300 15 500 5 mV/mT mT mV T
1) 2)
Unit
Notes
S MFR Inl BOS
BOS
12.5 50 -15 -500 -5 -
1003) 200
Programmable 4) = 0.3% of VDD5)
6) 7) 8)
T / C Error band 7)
Programmable in steps of 0.024%.
@ VDD = 5 V and TJ = 25C
This range is also used for temperature and offset pre-calibration of the IC. Depending on the Offset and Gain settings, the output may saturate at lower fields. Inl = Vout - Vout,lse with Vout,lse = least square error fit of Vout. Valid in the range (5% of VDD) < VOUT < (95% of VDD) In operating temperature range. More information, see "Operating Range" on Page 13. For Sensitivity S > 25 mV / mT. For lower sensitivities, the zero field voltage drift is dominant. Measured at 100 mT range.
6) 7) 8)
Data Sheet
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TLE4997I
Signal Processing
6
Signal Processing
The flow diagram in Figure 5 shows the data processing algorithm.
Range Hall Sensor
A D
X
LP Limiter
(Clamp)
+ LPDAC
D A
out
Temperature Sensor
TC 2 Gain
X X X
Offset
A D
+ TC1
1
X
+
-T0
Temperature Compensation
Stored in EEPROM Memory
Figure 5
Signal Processing Flow
Magnetic Field Path * The analog output signal of the chopped Hall cell is converted in the continuous-time A/D Converter. The range of the chopped A/D Converter can bet set in several steps (see Table 6). This assures a suitable level for the A/D Converter. * After the A/D conversion, a digital low pass filter reduces the bandwidth (Table 10). * A multiplier amplifies the value according to the gain setting (see Table 8) plus temperature compensation. * The offset value is added (see Table 9). * A limiter reduces the resulting signal to 12 bits and feeds the D/A converter. Temperature Compensation (Details are listed in Chapter 8) * The output signal of the temperature cell is also A/D converted. * The temperature is normalized by subtraction of the T0 value (zero point of the quadratic function). * The linear path is multiplied with the TC1 value.
Data Sheet
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TLE4997I
Signal Processing * In the quadratic path, the difference temperature is squared and multiplied with the TC2 value. * Both path outputs are added together and multiplied with the gain value from the EEPROM.
6.1
Magnetic Field Ranges
The working range of the magnetic field defines the input range of the A/D Converter. It is always symmetric to the zero field point. Any two points in the magnetic range can be selected to be the end points of the output curve. The output voltage represents the range between the two points. In the case of fields higher than the range values, the output signal may be distorted. The range must be set before the calibration of offset and gain.
Table 6 Range Low Mid High
Range Setting Range in mT 50 100 200 Parameter R 3 1 0
Table 7 Parameter Register size
1)
Range Symbol Limit Values min. max. 2 bit
1)
Unit
Notes
R
Ranges do not have a guaranteed absolute accuracy. The temperature pre-calibration is performed in the mid range (100 mT).
Data Sheet
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TLE4997I
Signal Processing
6.2
Gain Setting
The sensitivity is defined by the range and the gain setting. The output of the A/D Converter is multiplied with the gain value. Table 8 Parameter Register size Gain range
1)
Gain Symbol Limit Values min. max. 15 - 4.0 3.9998 244.14 bit ppm Unsigned integer value
1)2)
Unit
Notes
G Gain
Gain quantization steps Gain
Corresponds to 1/4096
For gain values between - 0.5 and + 0.5, the numeric accuracy decreases. To obtain a flatter output curve, it is recommended to select a higher range setting. A gain value of +1.0 corresponds to a typical 40 mV/mT sensitivity (100 mT range, not guaranteed). It is crucial to do a final calibration of each IC within the application using the Gain/VOS value.
2)
The gain value can be calculated by
:
( G - 16384 ) Gain = ----------------------------4096
6.3
Table 9 Parameter
Offset Setting
Offset Symbol Limit Values min. max. 15 -400 399 1.22 bit % VDD mV Unsigned integer value
1)
The offset voltage corresponds to an output voltage with zero field at the sensor. Unit Notes
Register size Offset range Offset quantization steps
1)
OS VOS
VOS
@ VDD = 5 V generally VDD / 4095
It is crucial to do a final calibration of each IC within the application using the Gain/VOS value.
The offset value can be calculated by: ( OS - 16384 ) V OS = --------------------------------- x V DD 4096
Data Sheet
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TLE4997I
Signal Processing
6.4
DSP Input Low Pass Filter
A digital Low Pass Filter is placed between the Hall A/D Converter and the DSP to reduce the noise level. The Low Pass filter has a constant DC amplification of 0 dB (this is exactly a gain of 1), which means that its setting has no influence on the internal Hall A/D Converter value. The bandwidth can be set in 8 steps. Table 10 Low Pass Filter Setting 0 78 1 244 2 421 3 615 4 826 5 6 7 1060 1320 off2)
Parameter LP Cutoff Frequency in Hz (at 3dB attenuation)1)
1) 2)
As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within 30%. The output low pass-interpolation filter behavior remains as a main component in the signal path.
Table 11 Parameter Register size
Range Symbol Limit Values min. max. 3 - 30 + 30 bit % Unit Notes
Corner frequency variation
LP f
Note: In Range 7 (filter off), the output noise increases. Because of higher DSP load, the current consumption also rises slightly.
Data Sheet
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TLE4997I
Signal Processing Figure 6 shows the characteristic of the filter as a magnitude plot (the highest setting is marked). The "off" position would be a flat 0 dB line. In this case, the output decimation filter limits the bandwidth of the sensor. The update rate after the Low Pass filter is 16 kHz.
0
-1
Magnitude (dB)
-2
-3 -4
-5
-6 101
102
103
Frequency (Hz)
Figure 6 DSP Input Filter (Magnitude Plot)
Data Sheet
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Signal Processing
6.5
DAC Input Interpolation Filter
An interpolation filter is placed between the DSP and the output DAC. It cannot be switched off. This filter limits the frequency behavior of the complete system if the DSP input filter is disabled. The update rate after the interpolation filter is 256 kHz.
0
-1
Magnitude (dB)
-2
-3 -4
-5
-6 101
102
103
104
Frequency (Hz)
Figure 7 DAC Input Filter (Magnitude Plot)
Note: As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within 30%.
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Signal Processing
6.6
Clamping
The clamping function is useful for splitting the output voltage into the operating range and error ranges. If the magnetic field is outside the selected measurement range, the output voltage Vout is limited to the clamping values. Table 12 Parameter Register size Clamping voltage low Clamping voltage high Clamping quantization steps Clamping voltage drift
1) 2)
Clamping Symbol Limit Values min. max. 2 x 12 0 0 100 100 1.22 -0.5 -0.5 0.5 0.5 bit % VDD % VDD mV % VDD
1) 1)
Unit
Notes
CL,CH VCLL VCLH VCLQ
VCL
@ VDD = 5 V In lifetime2) Over temperature2)
If clamping is set, it must be within the allowed output voltage range to be effective. Valid in the range (5% of VDD) < VOUT < (95% of VDD)
The clamping values are calculated by: Clamping low voltage: CLV CLL = ----------- x V DD 4096 Clamping high voltage: CH V CLH = ----------- x V DD 4096
Note: For an exact setup, the register value may be re-adjusted due to the actual output voltage in the clamping condition. The output voltage range itself has electrical limits. See the Electrical Characteristics of Vout.
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TLE4997I
Signal Processing Figure 8 shows an example in which the magnetic field range between Bmin and Bmax is mapped to voltages between 0.8 V and 4.2 V.
5
V out (V)
4 3 2 1
Error range
V CLH
Operating range
Error range 0 Bmin
Figure 8 Clamping Example
VCLL
Bmax
B (mT)
Note: The high value must be above the low value.
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Error Detection
7
Error Detection
Different error cases can be detected by the On-Board-Diagnostics (OBD) and reported to the microcontroller. The OBD is useful only when the clamping function is enabled. It is important to set the clamping threshold values inside the error voltage values shown in Table 13 and Table 14 to ensure that it is possible to distinguish between correct output voltages and error signals.
7.1
Voltages Outside the Operating Range
The output signals error conditions, if VDD lies * inside the ratings specified in Table 2 "Absolute Maximum Ratings" on Page 12 * outside the range specified in Table 3 "Operating Range" on Page 13. Table 13 Undervoltage and Overvoltage (RLOAD 10k pull down or 50k pull up) Parameter Symbol Limit Values min. Undervoltage threshold VDDuv Overvoltage threshold Output voltage @ overvoltage Supply current 1)
1)
Unit V V V mA
Notes
max. 4 8.3
3 7
VDDov VOUTov IDDuv
0.96 x VDD 10
VDDov < VDD 16 V
@ undervoltage
For overvoltage and reverse voltage, see Table 2 "Absolute Maximum Ratings" on Page 12.
7.2
Table 14 Parameter
Open Circuit of Supply Lines
Open Circuit (OBD Parameters) 1) Symbol Limit Values min. max. 0.2 5 V V Unit Notes
In the case of interrupted supply lines, the data acquisition device can alert the user.
Output voltage @ open VDD line Output voltage @ open VSS line
1)
VOUT VOUT
0 4.8
With VDD = 5 V and RL 10 k pull-down or RL 50 k pull-up.
Data Sheet
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Error Detection
7.3
Not Correctable EEPROM Errors
The parity method is able to correct one single bit in one EEPROM line. One other single bit error in another line can also be detected. As this situation is not correctable, this status is signalled at the output pin by clamping the output value to VDD. Table 15 Parameter Output voltage @ EEPROM error EEPROM Error Signalling Symbol Limit Values min. max. V 0.96 x VDD VDD Unit Notes
VOUT
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Temperature Compensation
8
Temperature Compensation
The magnetic field strength of a magnet depends on the temperature. This material constant is specific to different magnet types. Therefore, the TLE4997I offers a second order temperature compensation polynomial, by which the Hall signal output is multiplied in the DSP. There are three parameters for the compensation: * Reference temperature T0 * A linear part (1st order) TC1 * A quadratic part (2nd order) TC2 The following formula describes the sensitivity dependent on the temperature in relation to the sensitivity at the reference temperature T0:
S TC ( T ) = 1 + TC 1 x ( T - T 0 ) + TC 2 x ( T - T0 )
2
For more information, see also the signal processing flow in Figure 5. The full temperature compensation of the complete system is done in three steps: 1. Pre-calibration in the Infineon final test. The parameters TC1, TC2, T0 are set to maximally flat temperature characteristics regarding the Hall probe and internal analog processing parts in the 100 mT range. 2. Overall System calibration. The typical coefficients TC1, TC2, T0 of the magnetic circuitry are programmed. This can be done deterministically, as the algorithm of the DSP is fully reproducible. The final settings of the TC1, TC2, T0 values are relative to the pre-calibrated values. Table 16 Parameter Register size TC1 1st order coefficient TC1 Quantization steps of TC1 Register size TC2 2
nd
Temperature Compensation Symbol Limit Values Unit min. max. 9 15.26 -4 - 48 8 4 0.119 3 64 16 bit ppm/ C bit ppm/ C ppm/ C bit C C
1)
Notes Unsigned integer values
TL TC1 TC1 TQ TC2 TC2 TR T0 T0
-
-1000 2500 ppm/ C Unsigned integer values
order coefficient TC2
Quantization steps of TC2 Register size T0 Reference temperature Quantization steps of T0
1)
Unsigned integer values
A quantization step of 1C is handled by algorithm (See Application Note).
Data Sheet
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Temperature Compensation
8.1
Parameter Calculation
The parameters TC1, TC2 and T0 may be calculated by:
TL - 160 TC 1 = --------------------- x 1000000 65536 TQ - 128 TC 2 = ----------------------- x 1000000
8388608
T 0 = 16TR - 48
Now the output VOUT for a given field BIN at a specific temperature can be roughly calculated by: B IN V OUT = ------------ x S TC x S TCHall x S o x V DD + V OS B FSR BFSR is the full range magnetic field. It is dependent on the range setting (e.g 100 mT). So is the nominal sensitivity of the Hall probe times the Gain factor set in the EEPROM. STC is the temperature-dependent sensitivity factor calculated by the DSP. STCHall is the temperature behavior of the Hall probe. The pre-calibration at Infineon is performed such that the following condition is met:
S TC ( T J - T 0 ) x S TCHall ( T J ) 1
Within the application, an additional factor BIN(T) / BIN(T0) will be given due to the magnetic system. STC needs now to be modified to STCnew so that the following condition is satisfied:
B IN ( T ) -------------------- x S TCnew ( T ) x S TCHall ( T ) S TC ( T ) x S TCHall ( T ) 1 B IN ( T 0 )
Therefore, the new sensitivity parameters STCnew can be calculated from the pre-calibrated setup STC using the relation:
B IN ( T ) -------------------- x S TCnew ( T ) S TC ( T ) B IN ( T 0 )
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Calibration
9
Calibration
A special hardware interface to an external computing system and measurement equipment is required for calibration of the sensor. All calibration and setup bits can be written into a random access memory (RAM). This allows the EEPROM to remain untouched during the entire calibration process. Therefore, this temporary setup (using the RAM only) does not stress the EEPROM--and even allows a pre-verification1) of the setup before programming--as the number of EEPROM programming cycles is limited to provide a high data endurance. The digital signal processing is completely deterministic. This allows a two point calibration in one step without iterations. The two magnetic fields (here described as two "positions" of an external magnetic circuitry) need to be applied only once. Furthermore, a complete setup and calibration procedure can be performed requiring only one EEPROM programming cycle at the end2). After setting up the temperature coefficients, the calibrated Hall A/D Converter values of both positions need to be read and the sensor output signals (using a DAC test mode) need to be acquired for the corresponding end points. Using this data, the signal processing parameters can be immediately calculated with a program running on the external computing system. Note: The calibration and programming process must be performed only at the start of life of the device.
Table 17 Parameter
Calibration Characteristics Symbol Limit Values min. max. 30 C Unit Notes
Temperature of sensor at 2 point calibration and programming 2 point calibration accuracy1)
1)
tCAL
VCAL1
10
-0.5
0.5
% of VDD In both positions
Setup and validation performed at start of life.
Note: Depending on the application and external instrumentation setup, the accuracy of the 2 point calibration can be improved.
1) 2)
This feature is not required for a deterministic two-point setup to fulfill the specification. Details and basic algorithms for this step are available on request.
Data Sheet
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Calibration
9.1
Calibration Data Memory
When the MEMLOCK bits are programmed (two redundant bits), the memory contents are frozen and may no longer be changed. Furthermore, the programming interface is locked out and the chip remains in Application Mode only. This prevents accidental programming due to environmental influences.
Column Parity Bits
RowA Parity Bits
User-Calibration Bits
Pre-Calibration Bits
Figure 9
EEPROM Map
A matrix parity architecture allows the automatic correction of any single bit error. Each row is protected by a row parity bit. The sum of bits set including this bit must be an odd number (ODD PARITY). Each column is additionally protected by a column parity bit. The sum of all the bits in the even positions (0, 2, etc.) of all lines must be an even number (EVEN PARITY); the sum of all the bits in the odd positions (1,3, etc.) must be an odd number (ODD PARITY). This mechanism of different parity calculations protects against many block errors (such as erasing a full line or even the entire EEPROM). When modifying the application bits (such as Gain, Offset, TC, etc.) the parity bits must be updated. For the column bits, the pre-calibration area must be also read out and considered for correct parity generation. Note: A specific programming algorithm must be followed to ensure the data retention. A separate detailed programming specification is available on request.
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Calibration Table 18 Parameter Number of EEPROM programming cycles Programming Characteristics Symbol Limit Values min. max. 8 30 135 25 Cycles
1)
Unit
Notes Programming allowed only at start of lifetime
NPRG
10 100
Ambient temperature at TPRG programming Programming time Calibration memory Error correction
1)
C ms Bit Bit For complete memory 2) All active EEPROM bits All parity EEPROM bits
tPRG
-
1 cycle is the simultaneous change of 1 bit. For experimental and evaluation purposes, the device may be programmed more often, but then data retention is no longer guaranteed. Depends on the clock frequency at VDD.
2)
9.2
Programming Interface
The supply pin and the output pin are used as two-wire interface to transmit the EEPROM data to and from the sensor. This allows * communication with high data reliability * bus-type connection of several sensors In many applications, two sensors are used to measure the same parameter. This redundancy allows the operation to continue in an emergency mode. If both sensors use the same power supply lines, they can be programmed together in parallel. The data transfer protocol and programming is described in a separate document. A laboratory evaluation programmer for programming of the evaluation samples and qualified samples is available on request.
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Application Circuit
10
Application Circuit
Figure 10 shows the connection of multiple sensors to a microcontroller.
Ref
Voltage Tracker e.g.
TLE4250 ADCref
V DD
47nF
TLE out 4997I
GND
10k
ADCin1
47nF 100 nF 10k 100 nF
ADCin2 ADCGND
C
VDD
optional
10k 47nF 100 nF 10k 100 nF
47nF
TLE out 4997I
GND
Figure 10
Application Circuit
Note: For calibration and programming, the interface must be connected directly to the output pin. The given application circuit must be regarded as only an example. It needs to be adapted according to the requirements of the specific application.
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Package Outlines
11
Package Outlines
45
5
0.1 MAX.
4.06 0.05 1.5
B R0.13 MAX.
4.05 0.05
2A 1.5 0.05
5
1 0.2 (0.25)
1)
0.5 0.1 0.42 0.05 3x 0.5 B
R0.1 MAX. 0.82 0.05 0.36 0.05
1
2
3
2 x 1.27 = 2.54
12.7 1
(10) (Useable Length)
19 0.5
5
33 MAX.
+0.75
9 -0.50
18 0.5
A
6 0.5
Tape 6.35 0.4 12.7 0.3 Total tolerance at 19 pitches 1 1) No solder function area
GPO09662
4 0.3
0.25 -0.15 0.39 0.1
Figure 11
Data Sheet
PG-SSO-3-10 (Plastic Green Single Small Outline Package)
33 V 1.0, 2007-06
1-1
Adhesive Tape
TLE4997I
Life Support Applications
12
Life Support Applications
This product is not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Infineon Technologies AG customers using or selling this product for use in such applications do so at their own risk and agree to fully indemnify Infineon Technologies AG for any damages resulting from such improper use or sale.
Data Sheet
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Life Support Applications
Data Sheet
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www.infineon.com
Published by Infineon Technologies AG

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